CALL FOR PAPERS

The 4th IEEE International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA 2024) with a theme “VLSI with AI/ML” is a forum for researchers, educators, and industry leaders to discuss all technology enablers that would make VLSI technology and applications smarter and intelligent.

The conference will serve as a forum for researchers, academicians and practitioners from around the world to present their current theoretical research efforts, system and design solutions and practical applications in VLSI. Latest development with respect to 3D IC design, the technology and performance improvement by the usage of AI/ML would be another area to focus.

The conference will feature traditional paper presentations, workshops, as well as keynotes by renowned educational experts and authorities. Prospective authors are invited to submit full and original research papers which are not submitted/published/under consideration anywhere in other conferences/journal in electronic (PDF) format.

Topics to be discussed in this conference include (but are not limited to) the following:

SYSTEMS

CALL FOR THE WORKSHOP

Workshop is invited from experts (preferably from Industry) to be conducted in conjunction with the main conference. The length of the workshop can be half day or full day. Workshop with hands-on may attract more participants.

The following information is required from workshop organizer:

Organizers details like Name, Designation, Affiliation, Title of the workshop, Abstract, Brief profile of organizer(s), Photograph, Length of the workshop, Targeted audience, Plan for attracting audience, etc.

Please submit the workshop in pdf format via CMT submission page –

Please contact workshop chair for any queries.

Dr Praveen Jaraut: j_praveen@blr.amrita.edu

Dr Sumantra Sarkar: sumantraster@gmail.com

CALL FOR THE TUTORIAL

Tutorial is invited from experts to be conducted in association with the main conference. The length of the tutorial can be half day or full day. In-depth tutorial on emerging topics may attract more participants.

The following information is required from tutorial speaker.

Speaker details like Name, Designation, Affiliation, Title of the tutorial, Abstract, Brief profile of speaker(s), Photograph, Length of the tutorial, Targeted audience, etc.

Please submit the workshop in pdf format via CMT submission page –

Please contact workshop chair for any query.

Dr Abhilarsh Ravikumar: r_abhilash@blr.amrita.edu

Dr Uma Maheshwari: b_uma@blr.amrita.edu

Dr Chetan Singh Thakur: chetansingh84@gmail.com

CALL FOR THE INVITED PAPERS

Invited paper is requested from experience authors who are experts in the domain. The paper format and template remain the same as regular paper authors. However, the review is relatively light. The invited paper will also be submitted to Xplore. Please format your paper following the link SUBMISSION

Please submit the workshop in pdf format via CMT submission page –

Please contact General Co-Chairs for any query.

Dr Navin Kumar: navinkumar@ieee.org

Dr Mufti Mahmud: mufti.mahmud@ntu.ac.uk

  • Reliable and/or Safe Embedded Electronics

  • Systems for Testing

  • Digital System Design and Validation

  • Digital System and Circuits

  • Memory Subsystems

  • Memory Computing Systems

  • HW/SW Co-design

  • IoT Systems

  • Cyber Physical Systems

  • Embedded Operating Systems

  • Analog and Mixed Signal Systems

  • RF Circuits and Systems

  • Low Power Systems

  • Power Management Systems

  • Data Converters

  • High Speed Interfaces

  • Reliable Systems

  • Wireless Circuits and Systems

  • CAD Tools and Methodologies for Design and

  • Optimization

ARCHITECTURE

  • Inter-chip Interconnect

  • On-chip Interconnect

  • Multicore and Manycore

  • Data Centric Architecture

  • System on Chip

  • Embedded Processor Architecture in Vehicles

  • High-performance Computing

  • Embedded FPGA Reconfigurable Computing

  • Built In Self Test (BIST)

  • Design for Test Fault Tolerance

  • Quantum Computing

  • Network Security

  • Side-channel and Fault Analysis

  • Trusted Computing

  • Hardware Trojan

  • Functional Safety and Privacy

  • Optical Interconnect Architecture

  • Reliable Communication Architecture

  • NoC for FPGA, ASIC, CMP and MPSoC

  • Approximate Computing

  • 3D ICs

  • MEMS, GaN, and SiC devices

  • Layout Technology

  • Physical Design

  • Interconnect Technologies

  • 3D Packaging and Wafer-level Packaging

  • New Age Nanoelectronic Devices

  • Electronic Design Automation

  • Advanced CMOS Technology

  • Advanced Packaging and Heterogeneous Inte-

  • gration Technology

  • Process Technology

TECHNOLOGY

  • IoT and Big Data Analytics

  • AI-oriented Applications

  • Video and Image Processing

  • Applications Hardware Security and Trust

  • ML-oriented Applications

  • Wireless/Wired Communication Networks

  • Automotive and Vehicular Networks

  • RF Energy Harvesting

  • Power Electronics Applications

  • Biomedical and Healthcare Applications

  • Sensors and Instrumentation Applications

  • Signal Integrity Applications

APPLICATION

Accommodation facility available @ Amrita Vishwa Vidyapeetham, Bangalore campus - 560 035 (INDIA)

Limited accommodations are available at Amrita Bangalore on payment basis (first come first serve mode) subject to availability. Details are given below.

Contact Details:

Guest House (Direct booking): 7022588705
Dr. Ganapathi Hegde (Faculty co-ordinator for male delegates): 9448263527
Dr. Sunitha R. (Faculty co-ordinator for female delegates): 9972001530

Access the book of abstract of IEEE VLSI SATA 2024 using below link: